A Miniature High-Impedance Antenna
This project entails the design and demonstration of miniaturized antennas with the possibility of achieving complete integration with the RF front end, and ultimately achieving a single chip wireless system. The antennas need to be placed above ground plane which limits their radiation efficiency and reduces the bandwidths. Reducing the size, increasing the bandwidth, and improving the efficienc y of the antenna in the presence of the ground plane are problems that will be addressed.
This project has three main phases: first, to design a miniaturized antenna without a ground plane and with a fairly high efficiency to conserve as much power as pos-sible; second, enhancing the bandwidth of the miniaturized antenna and increasing the input impedance of the antenna so that it can be matched to a very high impedance; and finally, the radiation efficiency of the antenna in the presence of a ground plane must be enhanced. The first task is fulfilled knowing that by a virtual enforcement of the required boundary condition at the end of a slot antenna, the area occupied by the resonant antenna can be reduced. Furthermore, loading the antenna with distributed inductors also reduces the antenna size.
Combining these two techniques results in a highly miniaturized slot antenna. Different bandwidth enhancement techniques that increase the BW while maintaining the size have also been demonstrated. Miniaturization of the antenna will be achieved via alternative slot antenna geometries, for which the antenna impedance can be varied (and matched to any RF input) by attaching the RF front end circuit at the proper slot location. Design and fabrication of an on chip antenna using 0.13µm CMOS process was demonstrated.
This project entails the design and demonstration of miniaturized antennas with the possibility of achieving complete integration with the RF front end, and ultimately achieving a single chip wireless system. The antennas need to be placed above ground plane which limits their radiation efficiency and reduces the bandwidths. Reducing the size, increasing the bandwidth, and improving the efficienc y of the antenna in the presence of the ground plane are problems that will be addressed.
This project has three main phases: first, to design a miniaturized antenna without a ground plane and with a fairly high efficiency to conserve as much power as pos-sible; second, enhancing the bandwidth of the miniaturized antenna and increasing the input impedance of the antenna so that it can be matched to a very high impedance; and finally, the radiation efficiency of the antenna in the presence of a ground plane must be enhanced. The first task is fulfilled knowing that by a virtual enforcement of the required boundary condition at the end of a slot antenna, the area occupied by the resonant antenna can be reduced. Furthermore, loading the antenna with distributed inductors also reduces the antenna size.
Combining these two techniques results in a highly miniaturized slot antenna. Different bandwidth enhancement techniques that increase the BW while maintaining the size have also been demonstrated. Miniaturization of the antenna will be achieved via alternative slot antenna geometries, for which the antenna impedance can be varied (and matched to any RF input) by attaching the RF front end circuit at the proper slot location. Design and fabrication of an on chip antenna using 0.13µm CMOS process was demonstrated.
